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STi5119 - Low-cost interactive set-top box decoder

General Description

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Key Features

  • . . . 14 Introduction.
  • . . . 14 Omega2 (STBus) interconnect.
  • . . . 14 Processor core.
  • 14 Memory subsystem.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Confidential ® STx5119 Low-cost interactive set-top box decoder I Enhanced ST20 32-bit VL-RISC CPU G 200 MHz, single cycle cache, 4 Kbyte instruction cache, 4 Kbyte data cache, 2 Kbyte SRAM I Unified memory interface G up to166 MHz,16-bit wide SDR SDRAM interface I Programmable flash memory interface G four separately configurable banks, 8/16-bits wide G SRAM, peripheral, Flash, SFlash™ support G support for low-cost DVB-CI I Programmable transport interface (PTI) G single transport stream input G support for DVB transport streams G integrated DVB, descrambler I MPEG-2 MP@ML video decoder G fully programmable horizontal and vertical SRCs I Graphics/display G blitter based display compositor G 8 bpp CLUT graphics, 256 x 30 bits (AYCbCr) CLUT entries.