DESCRIPTION
In severe Multiple Paths conditions, the reception is improved to get the audio with high quality. s s s s BLOCK DIAGRAM A/D RDS I2C/SPI I2C/SPI HS3I IF Digital Signal Processor SAI1 DAC SAI0 CGU Oscillator SRC July 2002 This is preliminary information on a new product now in development. Details are subject to change without notice. 1/31 TDA7580 DESCRIPTION
(continued) The algorithm is self-adaptive, thus it requires no “on-the-field” adjustments after the parameters optimization. The chip embeds a Band Pass Sigma Delta Analogue to Digital Converter for 10.7MHz IF conversion from a “tuner device” (it is highly recommended the TDA7515). The internal 24bit-DSP allows some flexibility in the algorithm implementation, thus giving some freedom for customer required features. The total processing power offers a significant headroom for customer’s software requirement, even when the channel equalization and the decoding software is running. The Program and Data Memory space can be loaded from an external non volatile memory via I 2C or SPI.