TSA1002 Overview
N 10-bit A/D converter in deep submicron CMOS technology Single supply voltage: 2Vpp differential 50Msps sampling frequency Ultra low power consumption: The TSA1002 is based on a pipeline structure and digital error correction to provide excellent static linearity and guarantee 9.6 effective bits at Fs=40Msps, and Fin=24MHz.
TSA1002 Key Features
- o r P e u d o N ) s ( ct O b O - so VIN F AGND VINB P e let 14 15 DVCC DGND 16 CLK 17 DGND ro 42