Download UPSD3212A Datasheet PDF
UPSD3212A page 2
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UPSD3212A Description

7 52-PIN PACKAGE I/O PORT . 12 ARCHITECTURE OVERVIEW.

UPSD3212A Key Features

  • FAST 8-BIT 8032 MCU
  • 40MHz at 5.0V, 24MHz at 3.3V
  • Core, 12-clocks per instruction DUAL FLASH MEMORIES WITH MEMORY MANAGEMENT
  • Place either memory into 8032 program address space or data address space
  • READ-while-WRITE operation for InApplication Programming and EEPROM emulation
  • Single voltage program and erase
  • 100K minimum erase cycles, 15-year retention CLOCK, RESET, AND SUPPLY MANAGEMENT
  • SRAM is Battery Backup capable
  • Normal, Idle, and Power Down Modes
  • Power-on and Low Voltage reset supervisor