UPSD3234BV Overview
7 52-PIN PACKAGE I/O PORT . 12 ARCHITECTURE OVERVIEW . 13 ..Registers Memory Organization.
UPSD3234BV Key Features
- FAST 8-BIT 8032 MCU 40MHz at 5.0V, 24MHz at 3.3V
- Core, 12-clocks per instruction DUAL FLASH MEMORIES WITH MEMORY MANAGEMENT
- Place either memory into 8032 program address space or data address space
- READ-while-WRITE operation for InApplication Programming and EEPROM emulation
- Single voltage program and erase
- 100K minimum erase cycles, 15-year retention CLOCK, RESET, AND SUPPLY MANAGEMENT
- SRAM is Battery Backup capable
- Normal, Idle, and Power Down Modes
- Power-on and Low Voltage reset supervisor
- Programmable Watchdog Timer PROGRAMMABLE LOGIC, GENERAL PURPOSE