Datasheet Summary
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S T U/D302S
S amHop Microelectronics C orp.
Apr 03 , 2006
N-C hannel Logic Level E nhancement Mode Field E ffect Transistor
P R ODUC T S UMMAR Y
V DS S
30V
F E AT UR E S
( mΩ)
50 A
R DS (ON)
9 12
Max
S uper high dense cell design for low R DS (ON ).
@ V G S = 10V @ V G S = 4.5V
R ugged and reliable. TO-252 and TO-251 P ackage.
S TU S E R IE S TO-252AA(D-P AK)
S TD S E R IE S TO-251(l-P AK)
ABS OLUTE MAXIMUM R ATINGS (Ta=25 C unless otherwise noted)
P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous -P ulsed a
S ymbol V DS V GS @ T C =25 C ID IDM IS PD T J , T S TG
Limit 30 20 50 180 20 50 -55 to...