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S amHop Microelectronics C orp.
h P -C hannel E S nhancement Mode MOS FE T a t a P R ODUC T S UMMAR Y D . R V w w I w
DS S D
t e e
4U
m o .c
S T U/D1030P L
P reliminary May.28 2004
F E AT UR E S
DS (ON) ( m W ) Max
S uper high dense cell design for low R DS (ON ).
-30V
-18A
55 @ V G S = -10V 85 @ V G S = -4.5V
R ugged and reliable.
TO-252 and TO-251 P ackage.
D G S
G D
S
S DU S E R IE S TO-252AA(D-P AK)
S DD S E R IE S TO-251(l-P AK)
ABS OLUTE MAXIMUM R ATINGS (T A=25 C unless otherwise noted)
P arameter Drain-S ource Voltage Gate-S ource Voltage
Drain C urrent-C ontinuous a @ T J =125 C b -P ulsed Drain-S ource Diode Forward C urrent a Maximum P ower Dissipation a Operating Junction and S torage Temperature R ange
w
w
w
.
STU1030PL Datasheet
