DESCRIPTION
Each timeslot pulse is 8 BLCK cycles long. BCLK is the 2,048 station clock provided by the system. An active MRST will disable all outputs until a valid XSYNC input is recognised. The output TSX is delayed by half a cycle and indicates that one of 8 timeslots is currently active. There are 4 possible modes of operation, selectable by means of the BL0 and BL1 pins (See Table 1). APPLICATIONS
s s s s SA8702 BLOCK MODE TIME SLOT ALLOCATION CIRCUIT PCM Switching Systems PCM Transmission Systems Subscriber Multiplex Equipment PBX Systems PIN CONNECTIONS All inputs and outputs are C-MOS compatible. All outputs are push-pull with the exception of TSX which is open drain. The inputs MRST and BCLK are Schmitt Trigger. Inputs BL0 and BL1 have pull-ups. (See figure 1). Figure 1. SA8702 sames 1 02.02.93 SA8702 Operating Modes BL1 0 0 1 1 BL0 0 1 0 1 Mode of Operation Outputs Outputs Outputs Outputs active active active active in in in in timeslots 0 to 7 timeslots 8 to 15 timeslots 16 to 23 timeslots 24 to 31 Table 1.
