S3C831B Overview
21-S3-C831B/P831B-062003 USER'S MANUAL.
S3C831B Key Features
- Efficient register-oriented architecture
- Selectable CPU clock sources
- Idle and Stop power-down mode release by interrupt
- Built-in basic timer with watchdog function A sophisticated interrupt structure recognizes up to eight interrupt levels.
- Large number of programable I/O ports (Total 72 pins)
- PLL frequency synthesizer
- 16-bits intermediate frequency counter
- Two synchronous SIO modules
- Two 8-bit timer/counters
- One 16-bit timer/counter