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K4S280432I Datasheet

Jedec Standard 3.3v Power Supply Lvttl Compatible

Manufacturer: Samsung Semiconductor

This datasheet includes multiple variants, all published together in a single manufacturer document.

K4S280432I Overview

Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. Ordering Information Part No.

K4S280432I Key Features

  • JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Four banks operation MRS cycle with address key
  • All inputs are sampled at the positive going edge of the system clock
  • Burst read single-bit write operation
  • DQM (x4,x8) & L(U)DQM (x16) for masking
  • Auto & self refresh
  • 64ms refresh period (4K Cycle)
  • RoHS pliant for Pb-free Package

K4S280432I Applications

  • Samsung Electronics reserves the right to change products or specification without notice

More Datasheets from Samsung Semiconductor

See all Samsung Semiconductor datasheets

Part Number Description
K4S280432A 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL
K4S280432B 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL
K4S280432C 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL
K4S280432D 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL
K4S280432E 128Mb E-die SDRAM Specification
K4S280432E-TC75 128Mb E-die SDRAM Specification
K4S280432E-TL75 128Mb E-die SDRAM Specification
K4S280432F 128Mb F-die SDRAM Specification
K4S280432F-TC75 128Mb F-die SDRAM Specification
K4S280432F-TL75 128Mb F-die SDRAM Specification

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