KM644002B Datasheet | Samsung Semiconductor

FEATURES - Fast Access Time 10,12,15ns(Max.) - Low Power Dissipation Standby (TTL) : 50m A(Max.) (CMOS) : 10m A(Max.) Operating KM644002B - 10 : 195m A(Max.) KM644002B - 12 : 190m A(Max.) KM644002B - 15 : 185m A(Max.) - Single 5.0V±10% Power Supply - TTL patible Inputs and Outputs - I/O patible with 3.3V Device - Fully Static Operation - No Clock or Refresh required - Three State Outputs - Center Power/Ground Pin Configuration - Standard Pin Configuration KM644002BJ : 32-SOJ-400 KM644002BT : 32-TSOP2-400F PRELIMINARY CMOS SRAM GENERAL DESCRIPTION The KM644002B is a 4,194,304-bit high-speed Static Random Access Memory organized as 1,048,576 words by 4 bits. The KM644002B uses 4 mon input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNG′s advanced CMOS process and designed for high-speed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The KM644002B is packaged in a 400 mil 32-pin plastic SOJ or TSOP(II) forward. PIN CONFIGURATION(Top View) A0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 A19 A18 A17 A16 A15 OE ORDERING INFORMATION KM644002B -10/12/15 KM644002BI -10/12/15 mercial Temp. Industrial Temp. A1 A2 A3 A4 CS I/O1 26 I/O4 FUNCTIONAL BLOCK DIAGRAM Clk Gen. A0 A1 A3 A4 A5 A6 A7 A8 A2 Vcc Vss SOJ/ TSOP2 25 24 Vss Vcc Pre-Charge Circuit I/O2 WE A5 A6 23 I/O3 22 21 20 19 18 A14 A13 A12 A11 A10 Row Select A7 Memory Array 512 Rows 2048x4 Columns A8...