KM644002C Datasheet | Samsung Semiconductor

FEATURES - Fast Access Time 10,12,15,20ns(Max.) - Low Power Dissipation Standby (TTL) : 60m A(Max.) (CMOS) : 10m A(Max.) Operating KM644002C - 10 : 160m A(Max.) KM644002C - 12 : 150m A(Max.) KM644002C - 15 : 140m A(Max.) KM644002C - 20 : 130m A(Max.) - Single 5.0V ±10% Power Supply - TTL patible Inputs and Outputs - I/O patible with 3.3V Device - Fully Static Operation - No Clock or Refresh required - Three State Outputs - Center Power/Ground Pin Configuration - Standard Pin Configuration KM644002CJ : 32-SOJ-400 PR CMOS SRAM GENERAL DESCRIPTION The KM644002C is a 4,194,304-bit high-speed Static Random Access Memory organized as 1,048,576 words by 4 bits. The KM644002C uses 4 mon input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNG′s advanced CMOS process and designed for high-speed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The KM644002C is packaged in a 400 mil 32-pin plastic SOJ. PIN CONFIGURATION(Top View) A0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 A19 A18 A17 A16 A15 OE ORDERING INFORMATION - 10/12/15/20 KM644002CE - 10/12/15/20 KM644002CI - 10/12/15/20 mercial Temp. Extended Temp. Industrial Temp. A1 A2 A3 A4 CS I/O1 Vcc 26 I/O4 25 24 Vss Vcc FUNCTIONAL BLOCK DIAGRAM Clk Gen. A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 I/O1 ~I/O4 Vss I/O2 WE 23 I/O3 22 21 20 19 18 A14...