M366S0823DTS Datasheet | Samsung Semiconductor

Feature : 1,000mil height & double sided ¡Ü Refresh : 4K/64ms ¡Ü Contents ; Byte # Function Described 0 # of bytes written into serial memory at module manufacturer 1 Total # of bytes of SPD memory device 2 Fundamental memory type 3 # of row address on this assembly 4 # of column address on this assembly 5 # of module rows on this assembly 6 Data width of this assembly 7 Data width of this assembly 8 Voltage interface standard of this assembly 9 SDRAM cycle time @CAS latency of 3 10 SDRAM access time from clock @CAS latency of 3 11 DIMM configuration type 12 Refresh rate & type 13 Primary SDRAM width 14 Error checking SDRAM width 15 Minimum clock delay for back-to-back random column address 16 SDRAM device attributes : Burst lengths supported 17 SDRAM device attributes : # of banks on SDRAM device 18 SDRAM device attributes : CAS latency 19 SDRAM device attributes : CS latency 20 SDRAM device attributes : Write latency 21 SDRAM module attributes Function Supported -75 128bytes 256bytes (2K-bit) SDRAM 12 8 1 row 64 bits LVTTL 7.5ns 5.4ns Non parity 15.625us, support self refresh x16 None t CCD = 1CLK 1, 2, 4, 8 & full page 4 banks 3 0 CLK 0 CLK Non-buffered, non-registered & redundant addressing 22 SDRAM device attributes : General 23 SDRAM cycle time @CAS latency of 2 24 SDRAM access time from clock @CAS latency of 2 25 SDRAM cycle time @CAS latency of 1 26 SDRAM access time from clock @CAS latency of 1 27 Minimum row precharge time (=t RP) 28 Minimum row active to row active delay (t RRD) 29 Minimum RAS to CAS delay (=t RCD) 30 Minimum activate precharge time (=t RAS) 31 Module row density 32 mand and address signal input setup time 33 mand and address signal input hold time 34 Data signal input setup time +/- 10% voltage tolerance, Burst Read Single bit Write precharge all, auto precharge 20ns 15ns 20ns 45ns 1 row of 32MB 1.5ns 0.8ns 1.5ns Hex value -75 80h 08h 04h 0Ch 08h 01h 40h 00h 01h 75h 54h 00h 80h 10h 00h 01h 8Fh 04h 04h 01h 01h 00h 0Eh 00h 00h...