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K4C89363AF - DOUBLE DATA RATE Network-DRAM

Datasheet Summary

Description

K4C89363AF is a CMOS Double Data Rate Network-DRAM containing 301,989,888 memory cells.

K4C89363AF is organized as 2,097,152-words x 4 banks x36 bits.

Features

  • K4C89363AF Parameter F6 CL = 4 tC K C l o c k C y c l e T i m e ( m i n ) CL = 5 CL = 6 tRC R a n d o m R e a d / W r i t e C y c l e T i m e ( m i n ) tR A C R a n d o m A c c e s s T i m e ( m i n ) ID D 1 S O p e r a t i n g C u r r e n t ( s i n g l e b a n k ) ( m a x ) ID D 2 S P o w e r D o w n C u r r e n t ( m a x ) ID D 3 S S e l f - R e f r e s h C u r r e n t ( m a x ).
  • Fully Synchronous Operation - Double Data Rate (DDR) - Data input/output are synchronized with both edges.

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Datasheet Details

Part number K4C89363AF
Manufacturer Samsung semiconductor
File Size 1.31 MB
Description DOUBLE DATA RATE Network-DRAM
Datasheet download datasheet K4C89363AF Datasheet
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www.DataSheet4U.com K4C89363AF Network-DRAM-II Specification Version 0.0 - 1 - REV. 0.0 Nov. 2002 K4C89363AF Revision History Version 0.0 (Nov. 2002) - First Release - 2 - REV. 0.0 Nov. 2002 K4C89363AF 2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM DESCRIPTION K4C89363AF is a CMOS Double Data Rate Network-DRAM containing 301,989,888 memory cells. K4C89363AF is organized as 2,097,152-words x 4 banks x36 bits. K4C89363AF feature a fully synchronous operation referenced to clock edge whereby all operations are synchronized at a clock input which enables high performance and simple user interface coexistence. K4C89363AD can operate fast core cycle compared with regular DDR SDRAM.
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