K4S51153LF Datasheet PDF (8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA) | Download Samsung semiconductor K4S51153LF

K4S51153LF - 8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA

Description

The K4S51153LF is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 words by 16 bits, fabricated with SAMSUNG’s high performance CMOS technology.

Features

VDD/VDDQ = 2.5V/2.5V or 2.5V/1.8V.
LVCMOS compatible with multiplexed address.
Four banks operation.
MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).
EMRS cycle with address key programs.
All inputs are sampled at the positive going edge of the system clock.
Burst read single-bit write operation.
Special Function Support.

Datasheet Details

Part number	K4S51153LF
Manufacturer	Samsung semiconductor
File Size	108.95 KB
Description	8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA
Datasheet	K4S51153LF Datasheet
Additional preview pages of the K4S51153LF datasheet.

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Full PDF Text Transcription

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K4S51153LF - Y(P)C/L/F 8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA FEATURES • VDD/VDDQ = 2.5V/2.5V or 2.5V/1.8V. • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). • EMRS cycle with address key programs. • All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation. • Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh) • DQM for masking. • Auto refresh. • • • • 64ms refresh period (8K cycle). Commercial Temperature Operation (-25°C ~ 70°C). 2 /CS Support. 2Chips DDP 54Balls FBGA( -YXXX -Pb, -PXXX -Pb Free).

Published: Apr 7, 2005 |