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K4S560432E-NCL75 - SDRAM 256Mb E-die

Download the K4S560432E-NCL75 datasheet PDF. This datasheet also covers the K4S560432E-NC variant, as both devices belong to the same sdram 256mb e-die family and are provided as variant models within a single manufacturer datasheet.

Description

The K4S560432E / K4S560832E / K4S561632E is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 16,785,216 / 4 x 8,392,608 / 4 x 4,196,304 words by 4bits, fabricated with SAMSUNG's high performance CMOS technology.

Features

  • JEDEC standard 3.3V power supply.
  • LVTTL compatible with multiplexed address.
  • Four banks operation.
  • MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave).
  • All inputs are sampled at the positive going edge of the system clock.
  • Burst read single-bit write operation.
  • DQM (x4,x8) & L(U)DQM (x16) for masking.
  • Auto & self refresh.
  • 64ms.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (K4S560432E-NC_Samsungsemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
K4S560432E-UC75 SDRAM 256Mb E-die Samsung
K4S560832E-UC75 SDRAM 256Mb E-die Samsung
K4S561632C 256Mbit SDRAM Samsung
K4S561632E-UC60 SDRAM 256Mb E-die Samsung
K4S561632E-UC75 SDRAM 256Mb E-die Samsung

Other Datasheets by Samsung Semiconductor

Part Number Description
K4S560432E-NC75 SDRAM 256Mb E-die
K4S560432E-TC75 256Mb E-die SDRAM Specification
K4S560432E-TL75 256Mb E-die SDRAM Specification
K4S560432A 256Mbit SDRAM 16M x 4bit x 4 Banks Synchronous DRAM LVTTL
K4S560432B 256Mbit SDRAM 16M x 4bit x 4 Banks Synchronous DRAM LVTTL

Full PDF Text Transcription

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SDRAM 256Mb E-die (x4, x8, x16) CMOS SDRAM 256Mb E-die SDRAM Specification 54pin sTSOP-II Revision 1.0 August. 2003 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 1.0 August, 2003 SDRAM 256Mb E-die (x4, x8, x16) Revision History Revision 1.0 (August. 2003) - First release. CMOS SDRAM Rev. 1.0 August, 2003 SDRAM 256Mb E-die (x4, x8, x16) CMOS SDRAM 16M x 4Bit x 4 Banks / 8M x 8Bit x 4 Banks / 4M x 16Bit x 4 Banks SDRAM FEATURES • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address • Four banks operation • MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -.
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