K4S561632E-TC75 Datasheet PDF - Samsung semiconductor 256Mb E-die SDRAM Specification Specs

K4S561632E-TC75 - 256Mb E-die SDRAM Specification

Datasheet Summary

Description

The K4S560432E / K4S560832E / K4S561632E is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 16,785,216 / 4 x 8,392,608 / 4 x 4,196,304 words by 4bits, fabricated with SAMSUNG's high performance CMOS technology.

Features

JEDEC standard 3.3V power supply.
LVTTL compatible with multiplexed address.
Four banks operation.
MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave).
All inputs are sampled at the positive going edge of the system clock.
Burst read single-bit write operation.
DQM (x4,x8) & L(U)DQM (x16) for masking.
Auto & self refresh.
64ms.

Datasheet Details

Part number	K4S561632E-TC75
Manufacturer	Samsung semiconductor
File Size	198.76 KB
Description	256Mb E-die SDRAM Specification
Datasheet	K4S561632E-TC75 Datasheet
Additional preview pages of the K4S561632E-TC75 datasheet.

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Full PDF Text Transcription

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SDRAM 256Mb E-die (x4, x8, x16) CMOS SDRAM 256Mb E-die SDRAM Specification Revision 1.3 September. 2003 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 1.3 September. 2003 SDRAM 256Mb E-die (x4, x8, x16) Revision History Revision 1.0 (May. 2003) - First release. Revision 1.1 (June. 2003) - Correct Typo Revision 1.2 (June. 2003) - Added 166MHz speed bin in x16 Revision 1.3 (September. 2003) - Corrected typo in ordering information. CMOS SDRAM Rev. 1.3 September. 2003 SDRAM 256Mb E-die (x4, x8, x16) CMOS SDRAM 16M x 4Bit x 4 Banks / 8M x 8Bit x 4 Banks / 4M x 16Bit x 4 Banks SDRAM FEATURES • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address • Four banks operation • MRS cycle with address key programs -.

Published: Apr 7, 2005 |