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K4S643232E - 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL(3.3V)

General Description

The K4S643232E is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock.

Key Features

  • 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock Burst read single-bit write operation DQM for masking Auto & self refresh 15.6us refresh duty cycle CMOS SDRAM.

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Other Datasheets by Samsung Semiconductor

Part Number Description
K4S643232C 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL
K4S643232F 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL
K4S643233F-SDE 2Mx32 Mobile SDRAM 90FBGA CMOS SDRAM
K4S643233F-SDI 2Mx32 Mobile SDRAM 90FBGA CMOS SDRAM
K4S643233F-SDN 2Mx32 Mobile SDRAM 90FBGA CMOS SDRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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K4S643232E CMOS SDRAM 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL Revision 1.3 October 2001 Samsung Electronics reserves the right to change products or specification without notice. -1- Rev. 1.3 (Oct. 2001) K4S643232E Revision History Revision 1.3 (October 24, 2000) • Removed CAS Latency 1 from the spec. CMOS SDRAM Revision 1.2 (August 7, 2000) - Target • Added CAS Latency 1 Revision 1.1 (March 14, 2001) • Added K4S643232E-55 Revision 1.0 (October 20, 2000) • Removed Note 5 in page 9. tRDL is set to 2CLK in any case regardless of using AP or frequency Revision 0.4 (August 24, 2000) • Updated DC spec Revision 0.3 (August 1, 2000) • Changed the wording of tRDL related note for User’ s clear understanding Revision 0.