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K5A3X40YTC Datasheet PDF

Samsung semiconductor K5A3X40YTC

The K5A3x40YT(B)C featuring single 3.0V power supply is a Multi Chip Package Memory which combines 32Mbit Dual Bank Flash and 4Mbit fCMOS SRAM. The 32Mbit Flash memory is organized as 4M x8 or 2M x16 bit and 4Mbit SRAM is organized as 512K x8 or 256K x16 bit. The memory architecture of flash memory is designed to divide its memory arrays into 71 blocks and this provides highly flexible erase and program capability.
Part No. K5A3X40YTC
Datasheet K5A3X40YTC Download
Manufacturer
Samsung semiconductor
Description 4M(512Kx8/256Kx16) Full CMOS SRAM
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K5A3X40YTC datasheet page 1 preview

FEATURES

● Power Supply voltage : 2.7V to 3.3V
● Organization - Flash : 4,194,304 x 8 / 2,097,152 x 16 bit - SRAM : 524,288 x 8 / 262,144 x 16 bit
● Access Time (@2.7V) - Flash : 70 ns, SRAM : 55 ns
● Power Consumption (typical value) - Flash Read Current : 14 mA (@5MHz) Program/Erase Current : 15 mA Standby mode/Autosleep mode : 5 µA Read while Program or Read while Erase : 25 mA - SRAM Operating Current : 20 mA Standby Current : 0.5 µA
● Secode(Security Code) Block : Extra 64KB Block (Flash)
● Block Group Protection / Unprotection (Flash)
● Flash Bank Size : 8Mb / 24Mb , 16Mb / 16Mb
● Flash Endurance : 100,000 Program/Erase Cycles Minimum
● SRAM Data Retention : 1.5 V (min.)
● Industrial Temperature : -40°C ~ 85°C
● Package : 69-ball TBGA Type - 8 x 11mm, 0.8 mm pitch 1.2mm(max.) Thickness

GENERAL DESCRIPTION

This device is capable of reading data from one bank while programming or erasing in the other bank with dual bank organization. The Flash memory performs a program operation in units of 8 bits (Byte) or 16 bits (Word) and erases in units of a block.
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