Datasheet Details
| Part number | K7A161831B |
|---|---|
| Manufacturer | Samsung Semiconductor |
| File Size | 405.57 KB |
| Description | 18MB B-DIE SYNC SRAM SPECIFICATION 100TQFP WITH PB / PB-FREE |
| Datasheet |
 K7A161831B Datasheet
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General Description
The K7A163631B and K7A161831B are 18,874,368-bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System.
Key Features
- Synchronous Operation.
- 2 Stage Pipelined operation with 4 Burst.
- On-Chip Address Counter.
- Self-Timed Write Cycle.
- On-Chip Address and Control Registers.
- VDD= 2.5 or 3.3V +/- 5% Power Supply.
- 5V Tolerant Inputs Except I/O Pins.
- Byte Writable Function.
- Global Write Enable Controls a full bus-width write.
- Power Down State via ZZ Signal.
- LBO Pin allows a choice of either a interleaved burst.