K9K1208D0C Datasheet | Samsung Semiconductor

ation - Memory Cell Array : (1M + 32K)bit x 8bit - Data Register : (256 + 8)bit x8bit - Automatic Program and Erase(Typical) - Page Program : (256 + 8)Byte in 250µs - Block Erase : (4K + 128)Byte in 2ms - Status Register - 264-Byte Page Read Operation - Random Access : 10µs(Max.) - Serial Page Access : 80ns(Min.) - System Performance Enhancement - Ready/ Busy Status Output - mand/Address/Data Multiplexed I/O port - Hardware Data Protection - Program/Erase Lockout During Power Transitions - Reliable CMOS Floating-Gate Technology - Endurance : 1M Program/Erase Cycles - Data Retention : 10 years - mand Register Operation - 44(40) - Lead TSOP Type II (400mil / 0.8 mm pitch) FLASH MEMORY GENERAL DESCRIPTION The K9F8008W0M is a 1M(1,048,576)x8bit NAND Flash Memory with a spare 32K(32,768)x8bit. Its NAND cell provides the most cost-effective solution for the solid state mass storage market. A program operation programs the 264-byte page in typically 250 µs and an erase operation can be performed in typically 2ms on a 4K-byte block. Data in the page can be read out at 80ns cycle time per byte. The I/O pins serve as the ports for address and data input/output as well as mand inputs. The on-chip write controller automates all program and erase system functions, including pulse repetition, where required, and internal verify and margining of data. Even the write-intensive systems can take advantage of the K9F8008W0M extended reliability...