DESCRIPTION
Related Block HIU PIN NAME RESB SDA SCL SAS DIN CIU DOUT FS MCLK System CKIN GPI0 GPI1 GPI2 GPI3 TSELDR0 TSELDR1 TEST TUPDDR TSHFTDR TIDR TCLKDR TODR GPO0 GPO1 GPO2 GPO3 Power Ground VDD1, VDD2 VDD3, VDD4 GND1, GND2 GND3, GND4 PIN NO. 8 15 16 17 10 30 9 11 13 3 4 5 6 19 20 21 23 24 25 27 1 32 29 28 2, 12, 18, 26 7, 14, 22, 31 I/O I I/O I I I O I I I I I I I I I I I I I O O O O O P G I2C Serial Data I2C Serial Clock I2C Address Selection 16 Bit PCM Serial Data In 16 Bit PCM Serial Data Out PCM Data Frame Sync. PCM Data Bit Clock System Clock (9.84MHz) Test Pin0 (Host INT. Indicator) Test Pin1(0:No Fade, 1:Fade) Test Pin2 (0:RAM Test) Test Pin3 (0:Codec Bypass) Test Pin for JTAG Test Pin for JTAG Test Pin for JTAG Test Pin for JTAG Test Pin for JTAG Test Pin for JTAG Test Pin for JTAG Host Ack. Pin Host Test Output Host Test Output Host Test Output Digital Power (+3.0V) Digital GND DESCRIPTION
Reset: Active Low with CKIN(Min 10 cycle) 5 KD16903 DATA PROCESSOR 4. DSP PORT ASSIGNMENT FOR I/F WITH PERIPHERALS I/F HIU Read/ Write Read Write CIU Read Write Port EXT1 EXT1 EXT0 EXT0 Interrupt INT1 INT0 5.
Samsung semiconductor
