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KM681000C Datasheet 128k X8 Bit Low Power CMOS Static Ram

Manufacturer: Samsung Semiconductor

Overview: PRELIMINARY KM681000C Family Document Title 128K x8 bit Low Power CMOS Static RAM CMOS SRAM Revision History Revision No. 0.0 0.1 History Initial draft First revision - Seperate read and write at ICC, ICC1 ICC = ICC1 → Read : 15mA, Write : 35mA Finalized - Add 70ns speed bin for mercial product and 85ns speed bin for industrial. Revised - Improved operating current Add typical value. ICC Read : 15mA → 10mA(Remove write current) ICC2 : 90mA → 60mA - Speed bin change Remove 45ns from mercial part Remove 55ns and 100ns from industrial part. Draft Date November 22, 1995 April 15, 1996 Remark Design target Preliminary .. 1.0 September 5, 1996 Final 2.0 November 5, 1997 Final The attached data sheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices. 1 Revision 2.

General Description

The KM681000C families are fabricated by SAMSUNG′s advanced CMOS process technology.

The families support various operating temperature ranges and have various package types for user flexibility of system design.

The families also support low data retention voltage for battery backup operation with low data retention current.

Key Features

  • Process Technology: TFT.
  • Organization: 128K x8.
  • Power Supply Voltage: 4.5~5.5V.
  • Low Data Retention Voltage: 2V(Min).
  • Three state output and TTL Compatible.
  • Package Type: 32-DIP-600, 32-SOP-525, 32-TSOP1-0820F/R CMOS SRAM.

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