KS57P21632 Datasheet | Samsung Semiconductor

OVERVIEW OVERVIEW PRODUCT OVERVIEW The KS57C21632 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers). With an up-to-896-dot LCD direct drive capability, and flexible 8-bit timer/counters, the KS57C21632 offers an excellent design solution for a high-end LCD game. Up to 12 pins of the 100-pin QFP package can be dedicated to I/O. Seven vectored interrupts provide fast response to internal and external events. In addition, the KS57C21632's advanced CMOS technology provides for low power consumption. The KS57C21632 microcontroller is also available in OTP (One Time Programmable) version, KS57P21632. KS57P21632 microcontroller has an on-chip 32 K-byte one-time-programmable EPROM instead of masked ROM. The KS57P21632 is parable to KS57C21632, both in function and in pin configuration. 1-1 PRODUCT OVERVIEW KS57C21632/P21632 FEATURES Memory - - 768 × 4-bit RAM (excluding LCD display RAM) 32,768 × 8-bit ROM Interrupts - - - 12 I/O Pins - I/O: 12 pins Memory-Mapped I/O Structure - LCD Controller/Driver - - - - 56 segments and 16 mon terminals (8, 12 and 16 mon selectable) Capacitor bias for LCD output. Voltage booster and regulator All dots can be switched on/off Oscillation Sources 8-bit Basic Timer - - 4 interval timer functions Watch-dog timer - - - - One 16-bit Timer/Counter 1 - - - - Programmable 16-bit timer Arbitrary clock output (TCLO1) Inverted clock output (TCLO1) Configurable two 8-bit timer/counters Instruction Execution Times - - 0.95, 1.91, 15.3 µs at 4.19 MHz (main) 122 µs at 32.768 k Hz (subsystem) - Crystal, ceramic, or RC for main system clock Crystal oscillator for subsystem clock Main system clock frequency: 0.4-4.19 MHz Subsystem clock frequency: 32.768 k Hz CPU clock divider circuit (by 4, 8, or 64) Power-Down Modes - - - Idle mode (only CPU clock stops) Stop mode (main system oscillation stops) Subsystem clock stop mode Data memory bank...