Description
DIGITAL SIGNAL PROCESSOR for CDP
PIN NO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
SYMBOL
AVDD1 DPDO DPFIN DPFOUT CNTVOL AVSS1 DATX XIN XOUT WDCHO LRCHO ADATAO DVSS1 BCKO C2PO VREFL2 VREFL1 AVDD2 RCHOUT LCHOUT AVSS2 VREFH1 VREFH2 EMPH LKFS S0S1 RESET /ESP SQCK
IO
O I O I O I O O O O O O I I O O I I O O O I I I Analog VCC1
DESCRIPTION
Charge pump output for Digital PLL Filter input for Digital PLL Filter output for Digital PLL VCO control voltage for Digit
Features
- EFM data demodulation Frame sync detection/protection/insertion Powerful error correction (C1: 2error, C2: 4erasure) Interpolation 8fs digital filter (51th+13th+9th) Subcode data serial output CLV servo controller Micom interface Digital audio output Digital de-emphasis ESP interface Built-in 16K SRAM Built-in Digital PLL Double speed pla.