S3P72B9 Overview
With an up-to-1280-dot LCD direct drive capability, segment expandable circuit, 8-bit and 16-bit timer/counter, and serial I/O, the S3C72B5/C72B7/C72B9 offers an excellent design solution for a wide variety of applications which require LCD functions. Up to 51 pins of the 128-pin QFP package can be dedicated to I/O. Nine vectored interrupts provide fast response to internal and external events.
S3P72B9 Key Features
- 51 I/O Pins
- I/O: 47 pins (32 pins are configurable as SEG pins) Input only: 4 pins
- Programmable 16-bit timer External event counter Arbitrary clock frequency output External clock signal divider Configur
- Supports 16-bit serial data transfer in arbitrary format
- Memory-Mapped I/O Structure
- Data memory bank 15
- Idle mode (only CPU clock stops) Stop mode (main system clock stops) Subsystem clock stop mode
- 80 SEG × 16 , 88 SEG × 8 Terminals Internal resistor circuit for LCD bias 16 Level LCD contrast control (software) Segme
- Time interval generation: 0.5 s, 3.9 ms at 32,768 Hz 4 frequency outputs to BUZ pin Clock source generation for LCD
- Crystal, Ceramic or RC for main system clock Crystal oscillator for subsystem clock Main system clock frequency: 0.4-6 M