S524A40X21 Datasheet | Samsung Semiconductor

OVERVIEW The S524A40X11/40X21/40X41/60X81/60X51 serial EEPROM has a 1,024/2,048/4,096/8,192/16,384-bit capacity, supporting the standard I2C™-bus serial interface. It is fabricated using Samsung’s most advanced CMOS technology. It has been developed for low power and low voltage applications (1.8 V to 5.5 V). One of its major feature is a hardware-based write protection circuit for the entire memory area. Hardware-based write protection is controlled by the state of the write-protect (WP) pin. Using one-page write mode, you can load up to 16 bytes of data into the EEPROM in a single write operation. Another significant feature of the S524A40X11/40X21/40X41/60X81/60X51 is its support for fast mode and standard mode. FEATURES I2C-Bus Interface - - Two-wire serial interface Automatic word address increment - Operating Characteristics - Operating voltage - 1.8 V to 5.5 V Operating current - Maximum write current: < 3 m A at 5.5 V - Maximum read current: < 200 µA at 5.5 V - Maximum stand-by current: < 1 µA at 5.5 V - Operating temperature range - - 25°C to + 70°C (mercial) - - 40°C to + 85°C (industrial) - Operating clock frequencies - 100 k Hz at standard mode - 400 k Hz at fast mode - Electrostatic discharge (ESD) - 5,000 V (HBM) - 500 V (MM) Packages - 8-pin DIP, SOP, and TSSOP EEPROM - - - - - - - 1K/2K/4K/8K/16K-bit (128/256/512/1,024/2,048-byte) storage area 16-byte page buffer Typical 3 ms write cycle time with auto-erase function Hardware-based write protection for the entire EEPROM (using the WP pin) EEPROM programming voltage generated on chip 1,000,000 erase/write cycles 100 years data retention 1-1 S524A40X11/40X21/40X41/60X81/60X51 SERIAL EEPROM DATA SHEET Start/Stop Logic HV Generation Timing Control Control Logic Slave Address parator Word Address Pointer Row decoder A0 A1 A2 EEPROM Cell Array 128 x 8 bits 256 x 8 bits 512 x 8 bits 1024 x 8 bits 2048 x 8...