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S5C7212X Datasheet B/W CCD PROCESSOR

Manufacturer: Samsung Semiconductor

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General Description

No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Symbol MD2 MD1 EE1 EE2 VSS1 VDD1 FLD PBLK CSYNC CBLK VD HD WIN CLEN DFDO CLP3 CLP2 CLP1 VSS2 VDD2 SHD SHP VSS3 XV4 XSG3 V3 XSG1 XV1 XV2 XSUB VDD3 VSS4 I/O I I I I O O O O O O O O O O O O O O O O O O O O O Description CCIR/EIA mode selection NORMAL/MIRROR mode selection EE mode control input 1 EE mode control input 2 Ground +5V Field separation pulse Pre - blanking pulse Composite Sync.pulse Composite Blanking pulse Vertical driving pulse Horizontal driving pulse Window pulse 1/2 HD frequency pulse 1/2 VD frequency pulse Clamp pulse 3 (Dummy black level) Clamp pulse 2 (Optical black level) Clamp pulse 1 (Optical black level) Ground +5V Data Sample & Hold pulse Pre - Charge Sample & Hold pulse Ground Vertical transfer clock 4 Read out Pulse 3 Ve

Overview

TIMING & SYNC.

GENERATOR FOR B/W CCD S5C7212X01 INTRODUCTION The S5C7212X01 is a CMOS integrated circuit designed for making various timing pulses for B/W CCD camera.

Key Features

  • Compatible with both EIA and CCIR mode ( EIA : S5F325NW02 / S5F325NU02 CCIR : S5F329PW02 / S5F329PU02 ) Built in auto iris function (Electronic Exposure) Mirror mode timing generation Field interlace mode only Timing and sync one chip IC Oscillation frequency EIA : 19.06992MHz, CCIR : 18.93750MHz.

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