K4H510838C-UC Datasheet PDF (512Mb C-die DDR SDRAM)

K4H510838C-UC - 512Mb C-die DDR SDRAM

This page provides the datasheet information for the K4H510838C-UC, a member of the K4H510438C-UC 512Mb C-die DDR SDRAM family.

Description

32Mb x 16 64Mb x 8 128Mb x 4 DDR SDRAM VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 NC VDDQ LDQS NC VDD NC LDM WE CAS RAS CS NC BA0 BA1 AP/A10 A0 A1 A2 A3 VDD VDD DQ0 VDDQ NC DQ1 VSSQ NC DQ2 VDDQ NC DQ3 VSSQ NC NC VDDQ NC NC VDD NC NC WE CAS RAS CS NC BA0 BA1 AP/A10 A0 A1 A2 A3 VDD V

Features

VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR266, 333.
VDD : 2.6V ± 0.1V, VDDQ : 2.6V ± 0.1V for DDR400.
Double-data-rate architecture; two data transfers per clock cycle.
Bidirectional data strobe [DQS] (x4,x8) & [L(U)DQS] (x16).
Four banks operation.
Differential clock inputs(CK and CK).
DLL aligns DQ and DQS transition with CK transition.
MRS cycle with address key programs -. Read latency : DDR266(2, 2.5 Clock), DDR333(.

Datasheet Details

Part number	K4H510838C-UC
Manufacturer	Samsung
File Size	208.79 KB
Description	512Mb C-die DDR SDRAM
Datasheet	K4H510838C-UC Datasheet
Additional preview pages of the K4H510838C-UC datasheet.

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Full PDF Text Transcription

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DDR SDRAM 512Mb C-die (x4, x8, x16) DDR SDRAM 512Mb C-die DDR SDRAM Specification 66 TSOP-II with Pb-Free (RoHS compliant) Revision 1.0 January. 2005 Rev. 1.0 January. 2005 DDR SDRAM 512Mb C-die (x4, x8, x16) 512Mb C-die Revision History Revision 0.0 (April, 2004) - First version for internal review Revision 0.1 (August, 2004) - Preliminary spec release. Revision 0.2 (October, 2004) - Changed IDD current. Revision 1.0 (January, 2005) - Release the Rev. 1.0 spec. DDR SDRAM Rev. 1.0 January. 2005 DDR SDRAM 512Mb C-die (x4, x8, x16) DDR SDRAM Key Features • VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR266, 333 • VDD : 2.6V ± 0.1V, VDDQ : 2.6V ± 0.

Published: Mar 13, 2020 |