Download K4S643232H-TC-L50 Datasheet PDF
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K4S643232H-TC-L50 Description

The K4S643232H is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle.

K4S643232H-TC-L50 Key Features

  • JEDEC standard 3.3V power supply
  • LVTTL patible with multiplexed address
  • Four banks operation
  • MRS cycle with address key programs
  • CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)
  • All inputs are sampled at the positive going edge of the system clock
  • Burst read single-bit write operation
  • DQM for masking
  • Auto & self refresh
  • 64ms refresh period(4K Cycle)