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K6R4008C1C - 512K x 8bit High Speed Static CMOS SRAM

General Description

The K6R4008C1C is a 4,194,304-bit high-speed Static Random Access Memory organized as 524,288 words by 8 bits.

The K6R4008C1C uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle.

Key Features

  • Fast Access Time 10,12,15,20ns(Max. ).
  • Low Power Dissipation Standby (TTL) : 60mA(Max. ) (CMOS) : 10mA(Max. ) Operating K6R4008C1C-10 : 170mA(Max. ) K6R4008C1C-12 : 160mA(Max. ) K6R4008C1C-15 : 150mA(Max. ) K6R4008C1C-20 : 140mA(Max. ).
  • Single 5.0V±10% Power Supply.
  • TTL Compatible Inputs and Outputs.
  • I/O Compatible with 3.3V Device.
  • Fully Static Operation - No Clock or Refresh required.
  • Three State Outputs.
  • Center Power/Ground Pin.

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Other Datasheets by Samsung Semiconductor

Part Number Description
K6R4008C1C-C 512K x 8bit High Speed Static CMOS SRAM
K6R4008C1C-E 512K x 8bit High Speed Static CMOS SRAM
K6R4008C1C-I 512K x 8bit High Speed Static CMOS SRAM
K6R4016C1D CMOS SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PRELIMINARY K6R4008C1C-C, K6R4008C1C-E, K6R4008C1C-I CMOS SRAM Document Title 512Kx8 Bit High Speed Static RAM(5V Operating). Operated at Extended and Industrial Temperature Ranges. Revision History RevNo. Rev. 0.0 Rev. 1.0 History Initial release with Preliminary. 1.1 Removed Low power Version. 1.2 Removed Data Retention Characteristics. 1.3 Changed ISB1 to 20mA 2.1 Relax D.C parameters. Item ICC 12ns 15ns 20ns Previous 170mA 165mA 160mA Current 195mA 190mA 185mA Draft Data Feb. 12. 1999 Mar. 29. 1999 Remark Preliminary Preliminary Rev. 2.0 Aug. 19. 1999 Preliminary 2.2 Relax Absolute Maximum Rating. Item Voltage on Any Pin Relative to Vss Rev. 3.0 3.1 Delete Preliminary 3.2 Update D.C parameters and 10ns part.