K7A403600M Overview
The K7A403600M is a 4,718,592-bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System. It is organized as 128K words of 36bits and integrates address and control registers, a.
K7A403600M Key Features
- Synchronous Operation
- 2 Stage Pipelined operation with 4 Burst
- On-Chip Address Counter
- Self-Timed Write Cycle
- On-Chip Address and Control Registers
- VDD= 3.3V+0.3V/-0.165V Power Supply
- 5V Tolerant Inputs Except I/O Pins
- Byte Writable Function
- Global Write Enable Controls a full bus-width write
- Power Down State via ZZ Signal
