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KM62256C Datasheet PDF

Samsung KM62256C

The KM62256C family is fabricated by SAMSUNG ′s advanced CMOS process technology. The family supports various operating temperature ranges and has various package types for user flexibility of system design. The family also support low data retention voltage for battery back-up operation with low data retention current.
Part No. KM62256C
Datasheet KM62256C Download
Manufacturer
Samsung
Description 32K x 8 bit Low Power CMOS Static RAM
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KM62256C datasheet page 1 preview

FEATURES

● Process Technology : 0.7 µ m CMOS
● Organization : 32Kx8
● Power Supply Voltage : Single 5V ±10%
● Low Data Retention Voltage : 2V(Min)
● Three state output and TTL Compatible
● Package Type : 28-DIP-600, 28-SOP-450, 28-TSOP1 -0813.4F/R CMOS SRAM

GENERAL DESCRIPTION

PRODUCT FAMILY Power Dissipation Product Family KM62256CL KM62256CL-L KM62256CLE KM62256CLE-L KM62256CLI KM62256CLI-L Operating Temperature. Speed(ns) PKG Type Standby (ISB1 , Max) 100µ A 20µA 100µ A 50µA 100µ A 50µA 70mA Operating (Icc2) Commercial (0~70°C) Extended (-25~85°C) Industrial (-40~85°C) 55/70ns 28-DIP, 28-SOP 28-TSOP I R/F 28-SOP 28-TSOP I R/F 28-SOP 28-TSOP I R/F 70ns 70ns PIN

DESCRIPTION

OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3 A3 A4 A5 A6 A7 A12 A14 VCC WE A13 A8 A9 A11 OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 14 13 12 11 10 9 8 7 6 5 4 3 2 1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 15 16 17 18 19 20 21 22 23 24 25 26 27 28 A10 CS I/O8 I/O7 I/O6 I/O5 I/O4 VSS I/O3 I/O2 I/O1 A0 A1 A2 A2 A1 A0 I/O1 I/O2 I/O3 VSS I/O4 I/O5 I/O6 I/O7 I/O8 CS A10 FUNCTIONAL BLOCK DIAGRAM Clk gen.
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