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KM62256C - 32K x 8 bit Low Power CMOS Static RAM

General Description

The KM62256C family is fabricated by SAMSUNG ′s advanced CMOS process technology.

The family supports various operating temperature ranges and has various package types for user flexibility of system design.

Key Features

  • Process Technology : 0.7 µ m CMOS.
  • Organization : 32Kx8.
  • Power Supply Voltage : Single 5V ±10%.
  • Low Data Retention Voltage : 2V(Min).
  • Three state output and TTL Compatible.
  • Package Type : 28-DIP-600, 28-SOP-450, 28-TSOP1 -0813.4F/R CMOS SRAM.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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KM62256C Family Document Title 32Kx8 bit Low Power CMOS Static RAM CMOS SRAM Revision History Revision No 0.0 0.1 1.0 2.0 History Advance information Initial draft Finalize Revise - Add 45ns part with 30pF test load Revise - Change specification format and merge : Commercial, Extended, Industrial product in same datasheets. Revise - Change Speed bin Erase 45ns part from commercial product and 100ns from extended and industrial product. - Production change Erase Low power product from TSOP package Draft Data February 12th 1993 November 2nd 1993 September 24th 1994 August 12th 1995 Remark Design target Preliminary Final Final 3.0 April 15th 1996 Final 4.0 December 19 1997 Final The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD.