SR71010A Description
) TM TM SR71010A MIPS64 SUPERSCALAR MICROPROCESSOR ENGINES FOR THE DIGITAL AGE The SR71010A is a true 2-way superscalar MIPS64 TM microprocessor with a 9-stage pipeline designed for high performance applications such as networking, image processing and internet servers. The highly efficient architecture can operate up to a maximum frequency of 600MHz, and includes dual instruction fetch, up to 6-issue, up to...
SR71010A Key Features
- per formance floating point unit (FPU) that is fully MIPS64 pliant. The FPU is decoupled from the integer pipeline enabl
- Fully MIPS64 Instruction Set Architecture (ISA) pliant
- Dual fetch, dual dispatch, up to 6-issue, up to 6-execute, dual-mit
- Maximum operation rate of pipeline: 2 instructions per cycle
- Out-of-order issue and dispatch
- In-order retires 9-stage pipeline for high clock frequency
- Optimized pipeline bypass architecture for minimizing instruction interdependent stalls Intelligent dynamic branch predi
- Bi-modal 3Kbit table, Branch predictor
- Keeps pipeline full and minimizes branch mis-predict penalties
- Speculative execution down predicted paths