SR71040A Description
) PRELIMINARY MIPS64 SUPERSCALAR MICROPROCESSOR TM SR71040A ENGINES FOR THE DIGITA T L AGE TM The SR71040A microprocessor is a MIPS64- TM patible processor based on the proven 0.15u SR71010A design. The product provides a low cost, high-performance MIPS64-patible processor to enable a new class of processor-based embedded systems, and also to provide an upgrade path for users of R4000and R5000-class processors in...
SR71040A Key Features
- Fully MIPS64 Instruction Set Architecture (ISA) pliant
- Dual fetch, dual dispatch, up to 6-issue, up to 6-execute, dual-mit
- Maximum operation rate of pipeline: 2 instructions per cycle
- Out-of-order issue and dispatch
- In-order retires 9-stage pipeline for high clock frequency
- Optimized pipeline bypass architecture for minimizing instruction interdependent stalls Intelligent dynamic branch predi
- Bi-modal 3Kbit table, Branch predictor
- Keeps pipeline full and minimizes branch mis-predict penalties
- Speculative execution down predicted paths
- Maximizes sustainable performance