LC72134M Datasheet PDF - Sanyo Semicon Device Dual PLL Frequency Synthesizer Specs

LC72134M - Dual PLL Frequency Synthesizer

Datasheet Summary

Description

Pin XIN XOUT Pin No.

Crystal oscillator element connections (4.5 or 7.2 MHz) FMINa 18 Main PLL local oscillator signal input

FMINa is selected when DVS in the serial data is set to 1.

Input frequency: 10 to 160 MHz

Features

mp output.
PLL charge pump output A high level is output when the frequency of the local oscillator signal divided by N is higher than the reference frequency, and a low level is output when that frequency is lower. This pin goes to the high-impedance state when the frequencies match. AINa AOUTa 21 22 Main PLL lowpass filter.
Connections for the n-channel MOS transistor to be used for the PLL active l.

Datasheet Details

Part number	LC72134M
Manufacturer	Sanyo Semicon Device
File Size	463.96 KB
Description	Dual PLL Frequency Synthesizer
Datasheet	LC72134M Datasheet
Additional preview pages of the LC72134M datasheet.

📁 Similar Datasheet

LC72131K - PLL Frequency Synthesizer (ON Semiconductor)

LC72131KMA - PLL Frequency Synthesizer (ON Semiconductor)

LC7210 - (LC7220 -LC7227) Tuning Circuit of PSL Electronic Tuning System (Sanyo Electric)

LC72121MA - PLL Frequency Synthesizers (ON Semiconductor)

LC72151V - PLL Frequency Synthesizer (Sanyo)

LC7207 - (LC7200 Series) C-MOS LSI (Sanyo)

LC720DUC-SCM1 - WUXGA TFT LCD (LG)

LC720DUQ-SCM2 - WUXGA TFT LCD (LG)

LC7220 - FM / AM PLL (Sanyo Semiconductor)

LC7221 - (LC7220 -LC7227) PLL Synthesizer Tuner and Controller for FM/AM Radio (Sanyo Electric)

Full PDF Text Transcription

Click to expand full text

Ordering number : EN5814 CMOS IC LC72134M Dual PLL Frequency Synthesizer for FM Tuner Systems Overview The LC72134M is a dual PLL frequency synthesizer product that integrates on a single chip both an AM/FM audio broadcast reception PLL circuit (main PLL) and a dedicated FM multiplex reception PLL circuit (sub PLL). Since the main PLL circuit is equivalent to the LC72135M, software developed for that product can be used with this chip. The sub-PLL circuit can be controlled independently. Functions • High-speed programmable divider — FMINa (main): 10 to 160 MHz ... Pulse swallower technique (With built-in divide-by-2 prescaler) — FMINb (sub): 10 to 160 MHz ... Pulse swallower technique (With built-in divide-by-2 prescaler) — AMIN (main): 0.5 to 40 MHz ...

Published: Mar 22, 2005 |