LC78630E Overview
Key Features
- Built-in PLL for EFM signal synchronization (a hybrid analog-digital PLL that supports 4× playback)
- Built-in PLL for variable pitch playback (±13%)
- 18KB RAM on chip
- Error detection and correction (corrects two errors in C1 and four errors in C2)
- Frame jitter margin: ±8 frames
- Frame synchronization signal detection, protection, and insertion
- Dual interpolation adopted in the interpolation circuit
- EFM data demodulation
- Subcode demodulation
- Zero-cross muting adopted
