LA5623M Overview
EN5719 Monolithic Linear IC LA5623M bination System Reset IC Overview The LA5623M is a bination reset IC that provides two reset functions. The first, reset 1, detects the input voltage and applies a reset to the CPU system and other logic systems. The second, reset 2, detects the power supply voltage when the power is turned on or off, and applies a reset to the CPU system and other logic systems.
LA5623M Key Features
- Reset circuit (output 1) that detects the input voltage and provides a delay time of 200 µs
- System reset circuit (output 2) that provides a switchable delay time of 25, 50, 100, or 200 ms
- Low operating limit voltage
- Both reset 1 and reset 2 have hysteresis characteristics
- 0.3 4.2 50 25 50 100 200 0.2
- 1.25 15 200 0.2