FEATURES
q q q q q Super-high density (adopting 0.45µm silicon gate CMOS with 2- and 3-metal layers) High-speed operation (operation delay of internal gate = 0.160ns at 3.3V, 2-input power NAND standard) Internal gate = 3.3 and 3.0V (2.0V single), I/O buffer = 5.0, 3.3 and 3.0V (2.0V single) (built-in level shifter) Low power consumption (0.80µW/MHz/BC when internal cell = 3.0V) Output drivability (IOL = 100µ, 1, 3, 6, 12, 24 mA when PCI = 5.0V, IOL = 100µ, 1, 2, 6, 12mA when PCI = 3.3V, IOL = 50µ, 300µ, 600µ, 2, 4mA when 2.0V) q RAM, PLL, IrDA*, and various function cells available q Low noise output cell, PCI I/F, USB I/F*, LVDS*, JTAG s PRODUCT LINEUP 2-layer Metal Master FEATURES
3-layer Metal Total BCs (Raw Gates) Usable BCs 2-layer Metal 3-layer Metal Number of PADs (In Case of Micro Pitch) Internal Gates Propagation Input Gates Delay Output Buffers I/O Level Input Mode Output Mode SLA4078 SLA4115 SLA4162 SLA4239 SLA4318 SLA4411 SLA407T SLA411T SLA416T SLA423T SLA431T SLA441T 78,...
Seiko Epson Corp
