Datasheet Summary
POWER MANAGEMENT
Features
- - Input to linear regulator (VIN): 1.0V to 3.6V
- - Output (VTT): 0.5V to 1.8V
- - Bias Voltage (VDD): 2.35V to 3.6V
- - Up to 3A sink or source from VTT for DDR through
DDR4
- - + 1% over temperature (with respect to VDDQ/2, in- cluding internal resistor divider variation) VREF and VTT
- - Logic-level enable input
- - Built in soft-start
- - Thermal shutdown with auto-restart
- - Over current protection
- - Minimal output capacitance
- - Package: SOIC8-EDP
Applications
- - DDR Memory Termination
Low Voltage DDR Termination Regulator
Description
The SC2597 is designed to meet the latest JEDEC specification for low power DDR3 and DDR4, while also supporting DDR and...