SK10ELT21W Description
The SK10/100ELT21W is a single differential PECL to CMOS/TTL or LVPECL to LVCMOS/LVTTL Translator. Since PECL (Positive ECL) levels are used, only +VCC and ground are required. The small outline, 8 lead SOIC package, low skew, and the single gate design of the SK10/100ELT21W makes it ideal for applications which require the translation of a clock and a data signal.
SK10ELT21W Key Features
- 0.5 0.5 32 Ty p Max Unit V V mA Cond IOH = -3 mA IOL = 8 mA