SK10LVE111E Datasheet | SEMTECH

SEMTECH T oday's Results ...T omorrow's Vision Low Voltage 1:9 Differential ECL/PECL Clock Driver with Enable Input SK10LVE111E SK100LVE111E October 6, 1999 Preliminary Information This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices. Features - - - - - - - - - - - - 200 ps Part-to-Part Skew 50 ps Output-to-Output Skew Differential Design VBB Output Enable Input Voltage and Temperature pensated Outputs Low Voltage VEE Range of - 3,0 to - 3.8V 75KΩ Internal Pulldown Resistors Fully patible with Motorola MC100LVE111 Specified Over Industrial Temperature Range: - 40˚C to 85˚C ESD Protection of >2000V Available in 28-pin PLCC Package Low Voltage 1:9 Differential ECL / PECL Clock Driver 28 Pin PLCC Package Description The SK10/1000LVE111E is a low skew 1-to-9 differential driver designed with clock distribution in mind. The SK10/ 100LVE111E’s function and performance are similar to the SK100E111, with the added feature of low voltage operation. It accepts one signal input which can be either differential or single-ended if the VBB output is used. The signal is fanned out to 9 identical differential outputs. An enable input is also provided. A High disables the device by focing all Q outputs Low and all Q- outputs High. The device is specifically designed, modeled, and produced with low skew as the key goal. Optimal design and layout serve to minimize gate-to-gate skew within a device, and characterization is used to determine process control limits that ensure consistent tpd distributions from lot to lot. The net result is a dependable, guaranteed low skew device. To ensure that the tight skew specification is met, it is necessary that both sides of the differential output are terminated into 50Ω, even if only one side is being used. In most applications, all nine differential pairs will be used and therefore terminated. In the case where fewer than nine...