LH5116S Datasheet | Sharp Corporation

FEATURES - 2,048 × 8 bit organization - Access time: 1000 ns (MAX.) - Low-power consumption: Operating: 33 m W (MAX.) Standby: 3.3 µW (MAX.) - Fully-static operation - Three-state outputs - Single +3 V power supply - Package: 24-pin, 450-mil SOP DESCRIPTION The LH5116S is a static RAM organized as 2,048 × 8 bits. It is fabricated using silicon-gate CMOS process technology. It operates at a low supply voltage of 3 V ±10%. CMOS 16K (2K × 8) Static RAM PIN CONNECTIONS 24-PIN SOP A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC A8 A9 WE OE A10 CE I/O8 I/O7 I/O6 I/O5 I/O4 5116S-1 TOP VIEW Figure 1. Pin Connections for SOP Package CMOS 16K (2K × 8) Static RAM ROW DECODERS ROW ADDRESS BUFFERS A0 8 A5 3 A6 2 A7 1 A8 23 A9 22 A10 19 MEMORY CELL ARRAY (128 x128) 24 VCC 12 GND DATA CONTROL I/O1 9 I/O2 10 I/O3 11 I/O4 13 I/O5 14 I/O6 15 I/O7 16 I/O8 17 COLUMN I/O CIRCUITS COLUMN DECODERS COLUMN ADDRESS BUFFERS CE CE 18 WE 21 OE 20 4 A4 5 A3 6 A2 7 A1 5116S-2 Figure 2. LH5116S Block Diagram PIN DESCRIPTION SIGNAL PIN NAME SIGNAL PIN NAME A0 - A10 CE OE WE Address input Chip Enable input Output Enable input Write Enable input I/O1 - I/O8 VCC GND Data input/output Power supply Ground TRUTH TABLE CE OE WE MODE...