LH5164ASH Datasheet | Sharp Corporation

FEATURES - 8,192 × 8 bit organization - Access time: 500 ns (MAX.) - Power consumption: Operating: 60 m W (MAX.) @ 3 V Standby: 3 µW (MAX.) @ 70 °C @ 3 V 9 µW (MAX.) @ 85 °C @ 3 V - Fully-static operation - Three-state outputs - Wide operating voltage range: 2.5 V to 5.5 V - TTL patible I/O - Wide temp. range t OPR: -40 to +85°C - Packages: 28-pin, 450-mil SOP 28-pin, 8 × 13 mm2 TSOP (Type I) DESCRIPTION The LH5164ASH is a static RAM organized as 8,192 × 8 bits. It is fabricated using silicon-gate CMOS process technology. It is designed for 2.5 to 5.5 V low voltage operation and wide temperature range from -40 to +85°C. CMOS 64K (8K × 8) Static RAM PIN CONNECTIONS 28-PIN SOP TOP VIEW NC A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE CE2 A8 A9 A11 OE A10 CE1 I/O8 I/O7 I/O6 I/O5 I/O4 5164ASH-1 Figure 1. Pin Connections for SOP Package 28-PIN TSOP (Type I) TOP VIEW OE A11 A9 A8 CE2 WE VCC NC A12 A7 A6 A5 A4 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A10 CE1 I/O8 I/O7 I/O6 I/O5 I/O4 GND I/O3 I/O2 I/O1 A0 A1 A2 5164ASH-8 Figure 2. Pin Connections for TSOP Package CMOS 64K (8K × 8) Static RAM A3 ROW DECODERS ROW ADDRESS BUFFERS 7 A4 6 A5 5 A6 4 A7 3 A8 25 A9 24 A12 2 MEMORY ARRAY (256 x 256) 28 VCC 14 GND I/O1 11 I/O2 12 I/O3 13 I/O4 15 I/O5 16 I/O6 17 I/O7 18 I/O8 19 I/O CIRCUITS DATA CONTROL COLUMN DECODERS COLUMN ADDRESS BUFFERS WE 27 OE 22 CE2 26 CE1 20 10 A0 9 A1 8 A2 21 A10 23...