LH5324500 Overview
The LH5324500 is a 24M-bit mask-programmable ROM organized as 3,145,728 × 8 bits (Byte mode) or 1,572,864 × 16 bits (Word mode) that can be selected by a BYTE input pin. It is fabricated using silicon-gate CMOS process technology. LH5324500 Block Diagram PIN DESCRIPTION SIGNAL PIN NAME NOTE SIGNAL PIN NAME NOTE A 1 A20 D0 D15 BYTE CE Address input Data output Byte/word mode switch Chip Enable input 1 1 1 OE VCC GND...
LH5324500 Key Features
- Access time: 150 ns (MAX.)
- Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 µW (MAX.)
- Static operation
- TTL patible I/O
- Three-state outputs
- Single +5 V power supply
- Package: 44-pin, 600-mil SOP DESCRIPTION
- A20 D0
- D15 BYTE CE
- D15 ADDRESS INPUT LSB MSB SUPPLY CURRENT