LH5324P00A Datasheet PDF - Sharp Electrionic Components CMOS 24M (3M x 8/1.5M x 16) Mask-Programmable ROM Specs

LH5324P00A - CMOS 24M (3M x 8/1.5M x 16) Mask-Programmable ROM

Datasheet Summary

Description

The LH5324P00A is a 24M-bit mask-programmable ROM organized as 3,145,728 × 8 bits (Byte mode) or 1,572,864 × 16 bits (Word mode) that can be selected by a BYTE input pin.

It is fabricated using silicon-gate CMOS process technology.

Features

3,145,728 words × 8 bit organization (Byte mode) 1,572,864 words × 16 bit organization (Word mode).
Access time: 120 ns (MAX. ).
Power consumption: Operating: 440 mW (MAX. ) Standby: 1650 µW (MAX. ).
Static operation.
TTL compatible I/O.
Three-state outputs.
Single +5 V power supply.
Package: 44-pin, 600-mil SOP.

Datasheet Details

Part number	LH5324P00A
Manufacturer	Sharp Electrionic Components
File Size	63.19 KB
Description	CMOS 24M (3M x 8/1.5M x 16) Mask-Programmable ROM
Datasheet	LH5324P00A Datasheet
Additional preview pages of the LH5324P00A datasheet.

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Full PDF Text Transcription

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PRELIMINARY LH5324P00A FEATURES • 3,145,728 words × 8 bit organization (Byte mode) 1,572,864 words × 16 bit organization (Word mode) • Access time: 120 ns (MAX.) • Power consumption: Operating: 440 mW (MAX.) Standby: 1650 µW (MAX.) • Static operation • TTL compatible I/O • Three-state outputs • Single +5 V power supply • Package: 44-pin, 600-mil SOP DESCRIPTION The LH5324P00A is a 24M-bit mask-programmable ROM organized as 3,145,728 × 8 bits (Byte mode) or 1,572,864 × 16 bits (Word mode) that can be selected by a BYTE input pin. It is fabricated using silicon-gate CMOS process technology. 44-PIN SOP CMOS 24M (3M × 8/1.

Published: Mar 22, 2005 |