LH543620
Key Features
- Fast Cycle Times: 20/25/30 ns
- Selectable 36/18/9-Bit Word Width for Both Input Port and Output Port
- Byte-Order-Reversal Function (i.e., ‘Big-Endian’ £ ‘Little-Endian’ Conversion)
- 16-mA-IOL Three-State Outputs
- Automatic Byte Parity Checking
- Selectable Byte Parity Generation
- Five Status Flags: Full, Almost-Full, Half-Full, Almost-Empty, and Empty
- All FIFO Status Flags are Synchronous (AE, HF, AF Through Programming of Control Register)
- Programmed Values may be entered from either Port
- Two Enable Control Signals for each Port
