LH5491 Datasheet | Sharp Corporation

FEATURES - Fastest 64 × 8/9 Cascadable FIFO 35/25/15 MHz - Expandable in Word Width and FIFO Depth - Almost-Full/Almost-Empty and Half-Full Flags - Fully Independent Asynchronous Inputs and Outputs - LH5481 Output Enable forces Data Outputs to High-Impedance State - Pin-patible Replacements for Cypress CY7C408A/09A or Logic Devices L8C408/09 FIFOs - Industry Standard Pinout - Packages: 28-Pin, 300-mil DIP 28-Pin PLCC FUNCTIONAL DESCRIPTION The LH5481 and LH5491 are high-performance, asynchronous First-In, First-Out (FIFO) memories organized 64 words deep by eight or nine bits wide. The eight-bit LH5481 has an Output Enable (OE) function, which can be used to force the eight data outputs (DO) to a high-impedance state. The LH5491 has nine data outputs. These FIFOs accept eight or nine-bit data at the Data Inputs (DI). A Shift In (SI) signal writes the DI data into the FIFO. A Shift Out (SO) signal shifts stored data to the Data Outputs (DO). The Output Ready (OR) signal indicates when valid data is present on the DO outputs. If the FIFO is full and unable to accept more DI data, Input Ready (IR) will not return HIGH, and SI pulses will be ignored. If the FIFO is empty and unable to shift data to the DO outputs, OR will not return HIGH, and SO pulses will be ignored. The Almost-Full/Almost-Empty (AFE) flag is asserted (HIGH) when the FIFO is almost-full (56 words or more) or almost- empty (eight words or less). Cascadable 64 × 8 FIFO Cascadable 64 × 9 FIFO The Half-Full (HF) flag is asserted (HIGH) when the FIFO contains 32 words or more. Reading and writing operations may be asynchronous, allowing these FIFOs to be used as buffers between digital machines of different operating frequencies. The high speed makes these FIFOs ideal for high performance munication and controller applications. PIN CONNECTIONS 28-PIN PDIP AFE HF IR SI DI0 DI1 VSS DI2 DI3 DI4 DI5 DI6 DI7 NC/DI8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC MR SO OR DO0...