LH5PV16256 Overview
The LH5PV16256 is a 4M bit Pseudo-Static RAM with a 262,144 words × 16 bit organization. H = High L = Low X = Don’t care REQUIREMENTS 2WE control Please do not separate the UWE and LWE operation timing intentionally in the same write cycles. Each of the UWE/LWE should satisfy the timing specifications individually.
LH5PV16256 Key Features
- 262,144 words × 16 bit organization
- Power supply: +3.0 ± 0.15 V
- Access time: 120 ns (MAX.)
- Cycle time: 190 ns (MIN.)
- Power consumption (MAX.): 126 mW (Operating) 94.5 µW (Standby = CMOS input level) 220.5 µW (Self-refresh = CMOS input le
- LVTTL patible I/O
- Available for address refresh, auto-refresh, and self-refresh modes
- 2,048 refresh cycles/32 ms
- Address non-multiple
- Available for byte write mode using UWE and LWE pins