Datasheet Summary
Features
- 262,144 words × 16 bit organization
- Power supply: +3.0 ± 0.15 V
- Access time: 120 ns (MAX.)
- Cycle time: 190 ns (MIN.)
- Power consumption (MAX.): 126 mW (Operating) 94.5 µW (Standby = CMOS input level) 220.5 µW (Self-refresh = CMOS input level)
- LVTTL patible I/O
- Available for address refresh, auto-refresh, and self-refresh modes
- 2,048 refresh cycles/32 ms
- Address non-multiple
- Available for byte write mode using UWE and LWE pins
- Package: 44-pin, TSOP (Type II)
- Process: Silicon-gate CMOS
- Operating temperature: 0
- 70°C
- Not designed or rated as radiation hardened
CMOS 4M (256K × 16) Pseudo-Static RAM
DESCRIPTION
The LH5PV16256 is a 4M bit...