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LH28F128BFHT-PBTL75A - Flash memory

General Description

4 www.DataSheet4U.com PAGE 1 Electrical Specifications 19 1.1 Absolute Maximum Ratings 19 1.2 Operating Conditions 19 1.2.1 Capacitance 20 Simultaneous Operation Modes Allowed with 6 Planes 5 Memory Map 6 1.2.2 AC Input/Output Test Conditions 20 Identifier Codes and OTP Address for Read Opera

Key Features

  • Individual Block Lock and Block Lock-Down with Zero-Latency.
  • All blocks are locked at power-up or device reset.
  • Block Erase, Full Chip Erase, (Page Buffer) Word Program Lockout during Power Transitions.
  • Automated Erase/Program Algorithms.
  • 3.0V Low-Power 11µs/Word (Typ. ) Programming.
  • 9.5V No Glue Logic 9µs/Word (Typ. ) Production Programming and 0.8s Erase (Typ. ).
  • Cross-Compatible Command Support.
  • Basic Command Set.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PRELIMINARY PRODUCT SPECIFICATION Integrated Circuits Group www.DataSheet4U.com LH28F128BFHTPBTL75A Flash Memory 16Mbit (8Mbitx16) (Model Number: LHF12F17) Spec. Issue Date: June 7, 2004 www.DataSheet4U.com LHF12F17 • Handle this document carefully for it contains material protected by international copyright law. Any reproduction, full or in part, of this material is prohibited without the express written permission of the company. • When using the products covered herein, please observe the conditions written herein and the precautions outlined in the following paragraphs. In no event shall the company be liable for any damages resulting from failure to strictly adhere to these conditions and precautions.